Scalable Design and Synthesis of Reversible Circuits

The expectations on circuits are rising with their number of applications, and technologies alternative to CMOS are becoming more important day by day. A promising alternative is reversible computation, a computing paradigm with applications in quantum computation, adiabatic circuits, program inversion, etc. An elaborated design flow is not available to reversible circuit design yet. In this work, two directions are considered: Exploiting the conventional design flow and developing a new flow according to the properties of reversible circuits. Which direction should be taken is not obvious, so we discuss the possible assets and drawbacks of taking either direction. We present ideas which can be exploited and outline open challenges which still have to be addressed. Preliminary results obtained by initial implementations illustrate the way to go. By this we present and discuss two promising and complementary directions for the scalable design and synthesis of reversible circuits

Skalierbarer Entwurf und Synthese von reversiblen Schaltkreisen

The expectations on circuits are rising with their number of applications, and technologies alternative to CMOS are becoming more important day by day. A promising alternative is reversible computation, a computing paradigm with applications in quantum computation, adiabatic circuits, program inversion, etc. An elaborated design flow is not available to reversible circuit design yet. In this work, two directions are considered: Exploiting the conventional design flow and developing a new flow according to the properties of reversible circuits. Which direction should be taken is not obvious, so we discuss the possible assets and drawbacks of taking either direction. We present ideas which can be exploited and outline open challenges which still have to be addressed. Preliminary results obtained by initial implementations illustrate the way to go. By this we present and discuss two promising and complementary directions for the scalable design and synthesis of reversible circuits

SyReC: A hardware description language for the specification and synthesis of reversible circuits

Although researchers and engineers originally focused on a preponderantly irreversible computing paradigm, alternative models receive more and more attention. Reversible computation is a promising example which has applications in many emerging technologies such as quantum computation or alternative directions for low-power design. Accordingly, the design of reversible circuits has become an intensely studied research area. In particular, the efficient synthesis of complex reversible circuits poses an important and difficult research question. Most of the solutions proposed thus far are based on pure Boolean function representations such as truth tables or decision diagrams. In this paper, we provide a comprehensive introduction to and present extensions for the hardware description language SyReC which allows for the specification and automatic synthesis of reversible circuits. Besides a detailed presentation of the language׳s concepts and operations, we additionally propose algorithms that optimize the resulting circuits with respect to different objectives. A case study on a RISC CPU as well as a thorough experimental evaluation of both, the synthesis approach and its optimizations, show the applicability and demonstrate the advantage of SyReC compared to other solutions based on Boolean function representations